lowRISC

lowRISC is creating a fully open-sourced, Linux-capable, RISC-V-based SoC, that can be used either directly or as the basis for a custom design. They aim to tape out their first volume chip this year.

Their open-source SoC (System-on-a-Chip) designs will be based on the 64-bit RISC-V instruction set architecture. Volume silicon manufacture is planned as is a low-cost development board.

lowRISC is a not-for-profit organisation working closely with the University of Cambridge and the open-source community.

http://www.lowrisc.org/

>>21,23
x86 is pretty good, what AMD did with it wasn't.

As process sizes get smaller, transistors become leakier and so it will be more energy efficient to have less of them. Especially when in the stopped state, leakage becomes a huge contributor to overall power consumption. The majority of the transistors on modern CPUs are in the caches, not the core itself, but making the caches smaller means lower performance. The solution is obviously to make the instruction set denser, i.e. more CISC, so adding a few more transistors to the core to enable removing a lot more from the caches.

Intel is already having to spend a lot of effort to reduce idle power consumption because they have the smaller process. When the ARMs get to that point, they'll have to deal with that problem too.