Mill aka fuck RISC-V

https://en.wikipedia.org/wiki/Mill_architecture
Pros: VLIW, open architecture, can replace DSPs
Cons: none

so that all the scheduling is subject to a highly-optimizing compiler.

The same thing they tried with Itanium?
The magic compiler doesn't exist yet.

Звериная жестокость русских детей меня поразила уже тогда: они кидали живых щенков и котят в горную речку, затем бросая в несчастных животных камни, пока те не умирали.

So thats where nikita got his psychopathic inspirations.

https://spectrum.ieee.org/semiconductors/devices/riscvs-opensource-architecture-shakes-up-chip-design

>>4

RISC-V is the fifth generation of the “reduced instruction set computer” type of architecture.

I swear the RISC-V fuckers chose their Hurd's name specifically to encourage nonsense articles like this. The only RISC is RISC-V! We are all there is and all that ever was, and we are the best at it!

>>5

We are all there is and all that ever was, and we are the best at it!

That also makes you the worst at it!

cons: It doesn't work

Pros: [..] open architecture

How so? Last time I checked the whole thing was literally plastered with patents all over...? They mention all the time they're patenting the shit out of every minute detail. Next they'll threaten to sue you when you only mention it in forums or what?!?

It is a BSD Open Source License. This is a non-viral license, only asking that if you use it, you acknowledge the authors, in this case UC Berkeley. We have not filed nor do we intend to file any patents that would be required to implement a RISC-V-compatible processor. While we know of no patents that are required to implement the RISC-V ISA, there are many microarchitectural patents that might be infringed by a particular RISC-V implementation. We cannot indemnify users against ISA or implementation patents asserted by others.

>>8
You are correct indeed. I fucked up.

If SPARC/OpenRISC/MMIX/etc exist then what is the point of RISC-V?

>>9
The Mill, not RISC-V.