SHLD isn't Any Faster than IMUL

https://software.intel.com/sites/default/files/managed/9e/bc/64-ia-32-architectures-optimization-manual.pdf


see instruction latency appendix. That means you can multiply without any hacks. But division is still much more expensive than right shift.

>>21

This does not affect anything. You can still have timing attacks even if you do not store them in memory.

They are on HDD most of the time, then getting timing right makes it hard.

Address space randomization is a useless crap that has nothing to do with timing attacks

If you don't know where the shit is and how it gets accessed, you can't time processing of it in any predictable way, because the order of say page faults and cache misses would be different for each run.