SHLD isn't Any Faster than IMUL

https://software.intel.com/sites/default/files/managed/9e/bc/64-ia-32-architectures-optimization-manual.pdf


see instruction latency appendix. That means you can multiply without any hacks. But division is still much more expensive than right shift.

>>7

so it checks for multiplication by a power of two and picks appropriate circuit.

Sounds great for a timing attack.