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Transport Triggered Architecture

Name: Anonymous 2015-02-03 3:58

These days it's all about hating on side effects and sipping latte while cloud computing with a dildo in your ass. Why go through such great length to remove side effects anyway? Because it makes it easier to formally prove? Yeah right, that's almost guaranteed to never happen. Instead, we should embrace side effects. Just look at this snippet of assembly that I have here. It's written for a simulator I have in my head. It is a fibs implementation. Just look at how elegant it is. It does everything with a single instruction. Shoehorn a comparison in there somehow and it's a Turing machine (or maybe you don't have to do that either;. I'm not an expert on faggots' theories). I'm in love already.

move $add.a, 0
move $add.b, 1
fibs:
move $add.a, $add.b
move $add.b, $add.a
move $ip, @fibs

Beautiful. I love it. Everything is just moves. Better than a Lisp Machine. So naturally, the industry had to go in a completely tangential direction. Fucking Intel baggage has once again held us back and done decades of damage to elegant computing.

Name: Anonymous 2015-02-03 4:03

This looks like nonsense to me.
Is move just a copy instruction or is there something else going on here?

Name: Anonymous 2015-02-03 4:31

>>2
move is indeed just a copy instruction in that it just sends data somewhere without manipulating it itself. Computation is triggered by data transportation. It's not a von Newman architecture machine.

Any time a register is mutated, the associated computation is performed. For example, in move $add.a, $add.b, $add.a is mutated, so whatever value that was in it before gets added to the incoming data. Likewise, moving data into $add.b triggers it to compute. Well, computation is a side-effect of moving data really. This is a hardware design. There are only a few instructions and a lot of registers (compared to x86 at least), and the circuits that actually do computation are between the end of the move instruction and the register, not in any dedicated unit that executes. If you could think of a clever way to have conditional execution in a similar manner, you might be able to eliminate instructions all together and just have registers, pointers, and immediates.

So what's happening in >>1:
move $add.a, $add.b # a=0,b=1
move $add.b, $add.a # a=1,b=1
move $add.a, $add.b # a=1,b=2
move $add.b, $add.a # a=3,b=2
move $add.a, $add.b # a=3,b=5
move $add.b, $add.a # a=8,b=5
move $add.a, $add.b # a=8,b=13
move $add.b, $add.a # a=21,b=13

Name: Anonymous 2015-02-03 6:04

>>1
I like the way you think OP.

Name: Cudder !MhMRSATORI 2015-02-03 10:03

It's been done for MCUs:

http://www.maximintegrated.com/en/app-notes/index.mvp/id/3222

They're still available, but as a result of being more expensive and rather difficult to generate code for, no one really uses them.

Name: Anonymous 2015-02-03 10:24

Sounds like propagators in hardware. How would it handle I/O and the like?

Name: Anonymous 2015-02-03 15:53

https://en.wikipedia.org/wiki/One_instruction_set_computer
https://en.wikipedia.org/wiki/Transport_triggered_architecture

Name: Anonymous 2015-02-03 19:40

It's just syntaxtic sugar for a real instruction set.

Name: Anonymous 2015-02-04 2:06

>>5
I'm suprised that you're the one making the case for code generation difficulty. Anyway, compiler design is not my problem.

>>7
Oh thanks, I and everyone else in here would have never thought to look for information on Wikipedia! You are a true information seeker who has performed a valuable service.

>>8
If anything, CISC instruction sets would be syntactic sugar for this. But it doesn't really apply that way except in the most general sense that all CISC instructions are just macros for RISC instructions, and all instructions are just syntactic sugar for a Turing machine and it's tape.

Name: Anonymous 2015-02-04 2:15

>>9
uh die in a fire?

Name: Anonymous 2015-02-04 2:21

tape my anus

Name: Anonymous 2015-02-04 4:27

>>1

move dest src
not src dest move
not move src dest
do you read from right to left or left to right?

Name: Anonymous 2015-02-04 4:32

>>12

second one should be
dest src move

Name: Anonymous 2015-02-04 5:23

>>12
Actually, following the convention of subject-verb-object found in all good nafural languages, it should be $src Move $dest, or something like Move $src Into $dest.

Name: Anonymous 2015-02-04 6:03

>>14
Lingual imperialist.

Name: Anonymous 2015-02-04 6:36

This made me think. What we really need is X86 fibs instructions

xor rax, rax
inc rax
mov rbx, rax

; rax = 1, rbx = 0
fibs rax, rbx ; rax = 1, rbx = 1
fibs rax, rbx ; rax = 2, rbx = 1
fibs rax, rbx ; rax = 3, rbx = 2
fibs rax, rbx ; rax = 5, rbx = 3
fibs rax, rbx ; rax = 8, rbx = 5
fibs rax, rbx ; rax = 13, rbx = 8

so what do you think?

Name: Anonymous 2015-02-04 7:16

>>12
It's most sensible to place modifiers after objects because they may not appear at all. Consider:

mov dst, src // implicit subject
neg dst // implicit subject and modifier
ret // implicit subject, modifier, and object

This way, you can distinguish each part by its position alone. You see no end of stupid bugs in programs that place the object last, because then more context is needed. Dumb humans parse things incorrectly, too.

Name: Cudder !MhMRSATORI 2015-02-04 16:47

>>12-17
http://x86asm.net/articles/what-i-dislike-about-gas/

>>16
That's called xadd. Introduced with the 486.

Name: Anonymous 2015-02-05 4:49

>>18
Leave it to Intel to clutter the arch with useless garbage. And then they have the nerve to try to use the fact that instruction decoder take up 99% of the die to excuse the fact that their chips need 1.21 gigawatts to run.

Name: Anonymous 2015-02-05 5:03

the goal the method the

Name: Anonymous 2015-02-05 5:31

>>18
GAS equivalents are not so readable:

He just says that and doesn't explain why.

Name: Anonymous 2015-02-05 11:45

>>18
Whoah, so there's already such instruction. Intel engineers just named it in a retarded way.

Name: Cudder !MhMRSATORI 2015-02-05 11:56

>>19,22
Idiots. xadd is not for your toy algorithms. It's for concurrent programming.

Name: Anonymous 2015-02-05 19:55

Cudder is all talk and no action.

Name: Anonymous 2015-02-05 20:39

>>23
fibonacci sequence
toy algorithm
WTF??!?!?

Name: Anonymous 2015-02-05 21:26

tranport triggered asynchronous memristor-based architecture

Name: Anonymous 2015-02-05 21:37

>>26
electrical engineering is surely getting its buzzwords

Name: Anonymous 2015-02-05 21:41

>>23
Cudder looks angry lately. Failures in the personal life?

Name: Anonymous 2015-02-05 22:31

>>25
Are there really people out there who think Fibonacci sequences are NOT toy algorithms?
What would you use the algorithm for apart from finishing an exercise in your book?

Name: Anonymous 2015-02-05 22:31

>>27
It's always had buzzwords, the bullshit just gets weeded out a lot faster. In CS it takes decades to get rid of idiocy while EE moght only take a few years.

Name: Anonymous 2015-02-05 22:38

>>30
Its. Get it right, faggot.

Name: Anonymous 2015-02-05 22:52

>>31
Its literally it's dopey.
It's = it has.
Didn't they teach you about contractions at school>

Name: Anonymous 2015-02-05 22:57

>>29
Fibonacci, Pascal's triangle and factorials serve as building blocks for more complex algorithms and data structures.
http://en.wikipedia.org/wiki/Fibonacci_heap

Name: Anonymous 2015-02-05 23:53

>>32
It's = it is.

Name: Anonymous 2015-02-06 5:28

>>29
Elite uses fibs for generating it's game universe.

Name: Anonymous 2015-02-06 5:36

>>35
I.e. a toy uses toy algorithm for doing toy things.

Name: Anonymous 2016-06-24 18:11

hello

Name: Anonymous 2016-06-25 4:44

>>1
Why go through such great length to remove side effects anyway? Because it makes it easier to formally prove?

All of that FP bullshit is a failure. It makes programs harder to formally prove.

Name: Anonymous 2016-06-25 5:10

This thread is incredibly TRIGGERING
i'm going to curve up in a ball hugging printed Haskell manuals.

Name: Anonymous 2016-06-25 6:43

>>38
Good argument my friend.

Name: Anonymous 2016-06-25 12:52

>>14
Good natural languages do not have a fixed word order.

Name: Anonymous 2016-06-25 13:44

>>41
What is "good"?

Name: Anonymous 2016-06-25 19:26

>>42
Baby don't hurt me
Don't hurt me
No more

Name: Anonymous 2016-06-25 19:38

>>43
Baby don't check them
Don't check them
No more

Name: Anonymous 2016-06-25 20:24

>>16
FIBS(tm) extension is now available in select Xeon(tm) Skylake(tm) CPUs. Call your local Intel(tm) salesperson now for more information.
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