Name: Anonymous 2019-12-03 7:07
That guy who likes to flaunt his outdated knowledge of RISC vs CISC. He thinks RISC has better IPC than today's CISC architectures. That you can get higher clock rates out of silicon with RISC. Thinks that RISC architectures like ARM are about to unseat x86/x86-64 any day now. When he talks about ARM being RISC and you point out that loads/store pair, load/store with auto increment, arithmetic/logic with shifts, vector LD/ST instructions in NEON to do strided reads/writes, etc. and are all very much typical of CISC architectures, he gets extremely mad and bangs the desk. Shows up the next day talking about how ARM sucks and RISC-V is the greatest thing to have ever been created. You show him a graph comparing RISC-V to current x86-64 Ryzen processors from AMD and how Ryzen has two orders of a magnitude greater performance/watt ratio to latest RISC-V CPUs and you watch him throw a fit, falling to his knees, convulsing and frothing at the mouth.